mirror of
https://github.com/beefytech/Beef.git
synced 2025-06-08 03:28:20 +02:00
Fixed datalayout initialization
This commit is contained in:
Brian Fiete
parent
a3848bbd78
commit
b3fe79522e
5 changed files with 142 additions and 128 deletions
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@ -469,6 +469,7 @@ void BfCodeGenThread::RunLoop()
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BP_ZONE_F("BfCodeGen::RunLoop.LLVM %s", request->mOutFileName.c_str());
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BfIRCodeGen* llvmIRCodeGen = new BfIRCodeGen();
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llvmIRCodeGen->SetCodeGenOptions(request->mOptions);
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llvmIRCodeGen->SetConfigConst(BfIRConfigConst_VirtualMethodOfs, request->mOptions.mVirtualMethodOfs);
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llvmIRCodeGen->SetConfigConst(BfIRConfigConst_DynSlotOfs, request->mOptions.mDynSlotOfs);
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llvmIRCodeGen->ProcessBfIRData(request->mData);
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@ -501,7 +502,7 @@ void BfCodeGenThread::RunLoop()
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outFileName = request->mOutFileName + ".s";
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else
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outFileName = request->mOutFileName + BF_OBJ_EXT;
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if (!llvmIRCodeGen->WriteObjectFile(outFileName, request->mOptions))
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if (!llvmIRCodeGen->WriteObjectFile(outFileName))
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{
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result.mType = BfCodeGenResult_Failed;
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dirCache->FileFailed();
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@ -11,6 +11,7 @@ namespace llvm
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{
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class Module;
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class LLVMContext;
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class TargetMachine;
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}
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NS_BF_BEGIN
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@ -26,24 +26,6 @@
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#pragma warning(pop)
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namespace llvm
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{
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class Constant;
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class Value;
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class Type;
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class BasicBlock;
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class Function;
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class FunctionType;
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class MDNode;
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class InlineAsm;
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class DIType;
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class DIBuilder;
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class DICompileUnit;
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class AttributeList;
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class Module;
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class LLVMContext;
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};
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NS_BF_BEGIN
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class BfModule;
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@ -708,11 +690,6 @@ public:
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mId = val.mId;
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}
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BfIRMDNode(llvm::MDNode* mdNode)
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{
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mId = -1;
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}
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operator bool() const
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{
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return mId != -1;
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@ -320,6 +320,7 @@ BfIRCodeGen::BfIRCodeGen()
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{
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mStream = NULL;
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mBfIRBuilder = NULL;
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mLLVMTargetMachine = NULL;
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mNopInlineAsm = NULL;
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mAsmObjectCheckAsm = NULL;
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@ -356,6 +357,7 @@ BfIRCodeGen::~BfIRCodeGen()
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delete mStream;
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delete mIRBuilder;
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delete mDIBuilder;
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delete mLLVMTargetMachine;
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delete mLLVMModule;
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delete mLLVMContext;
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}
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@ -1359,6 +1361,100 @@ void BfIRCodeGen::CreateMemSet(llvm::Value* addr, llvm::Value* val, llvm::Value*
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mIRBuilder->CreateMemSet(addr, val, size, alignment, isVolatile);
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}
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void BfIRCodeGen::InitTarget()
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{
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llvm::SMDiagnostic Err;
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llvm::Triple theTriple = llvm::Triple(mLLVMModule->getTargetTriple());
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llvm::CodeGenOpt::Level optLvl = llvm::CodeGenOpt::None;
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String cpuName = "";
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String arch = "";
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// Get the target specific parser.
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std::string Error;
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const llvm::Target *theTarget = llvm::TargetRegistry::lookupTarget(arch.c_str(), theTriple, Error);
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if (!theTarget)
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{
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Fail(StrFormat("Failed to create LLVM Target: %s", Error.c_str()));
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return;
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}
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llvm::TargetOptions Options = llvm::TargetOptions(); // InitTargetOptionsFromCodeGenFlags();
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String featuresStr;
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if (mCodeGenOptions.mOptLevel == BfOptLevel_O1)
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{
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//optLvl = CodeGenOpt::Less;
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}
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else if (mCodeGenOptions.mOptLevel == BfOptLevel_O2)
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optLvl = llvm::CodeGenOpt::Default;
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else if (mCodeGenOptions.mOptLevel == BfOptLevel_O3)
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optLvl = llvm::CodeGenOpt::Aggressive;
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if (mCodeGenOptions.mSIMDSetting == BfSIMDSetting_SSE)
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featuresStr = "+sse";
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else if (mCodeGenOptions.mSIMDSetting == BfSIMDSetting_SSE2)
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featuresStr = "+sse2";
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else if (mCodeGenOptions.mSIMDSetting == BfSIMDSetting_SSE3)
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featuresStr = "+sse3";
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else if (mCodeGenOptions.mSIMDSetting == BfSIMDSetting_SSE4)
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featuresStr = "+sse4";
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else if (mCodeGenOptions.mSIMDSetting == BfSIMDSetting_SSE41)
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featuresStr = "+sse4.1";
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else if (mCodeGenOptions.mSIMDSetting == BfSIMDSetting_AVX)
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featuresStr = "+avx";
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else if (mCodeGenOptions.mSIMDSetting == BfSIMDSetting_AVX2)
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featuresStr = "+avx2";
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llvm::Optional<llvm::Reloc::Model> relocModel;
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llvm::CodeModel::Model cmModel = llvm::CodeModel::Small;
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switch (mCodeGenOptions.mRelocType)
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{
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case BfRelocType_Static:
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relocModel = llvm::Reloc::Model::DynamicNoPIC;
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break;
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case BfRelocType_PIC:
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relocModel = llvm::Reloc::Model::PIC_;
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break;
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case BfRelocType_DynamicNoPIC:
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relocModel = llvm::Reloc::Model::DynamicNoPIC;
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break;
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case BfRelocType_ROPI:
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relocModel = llvm::Reloc::Model::ROPI;
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break;
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case BfRelocType_RWPI:
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relocModel = llvm::Reloc::Model::RWPI;
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break;
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case BfRelocType_ROPI_RWPI:
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relocModel = llvm::Reloc::Model::ROPI_RWPI;
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break;
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default: break;
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}
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switch (mCodeGenOptions.mPICLevel)
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{
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case BfPICLevel_Not:
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mLLVMModule->setPICLevel(llvm::PICLevel::Level::NotPIC);
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break;
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case BfPICLevel_Small:
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mLLVMModule->setPICLevel(llvm::PICLevel::Level::SmallPIC);
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break;
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case BfPICLevel_Big:
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mLLVMModule->setPICLevel(llvm::PICLevel::Level::BigPIC);
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break;
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default: break;
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}
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mLLVMTargetMachine =
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theTarget->createTargetMachine(theTriple.getTriple(), cpuName.c_str(), featuresStr.c_str(),
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Options, relocModel, cmModel, optLvl);
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mLLVMModule->setDataLayout(mLLVMTargetMachine->createDataLayout());
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}
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void BfIRCodeGen::HandleNextCmd()
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{
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int curId = mCmdCount;
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@ -1392,6 +1488,8 @@ void BfIRCodeGen::HandleNextCmd()
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mLLVMModule->setTargetTriple(llvm::sys::getDefaultTargetTriple());
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else
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mLLVMModule->setTargetTriple(targetTriple.c_str());
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InitTarget();
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}
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break;
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case BfIRCmd_Module_AddModuleFlag:
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@ -4219,6 +4317,11 @@ void BfIRCodeGen::HandleNextCmd()
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}
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}
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void BfIRCodeGen::SetCodeGenOptions(BfCodeGenOptions codeGenOptions)
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{
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mCodeGenOptions = codeGenOptions;
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}
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void BfIRCodeGen::SetConfigConst(int idx, int value)
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{
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auto constVal = llvm::ConstantInt::get(llvm::Type::getInt32Ty(*mLLVMContext), value);
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@ -4819,7 +4922,7 @@ llvm::Expected<llvm::BitcodeModule> FindThinLTOModule(llvm::MemoryBufferRef MBRe
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llvm::inconvertibleErrorCode());
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}
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bool BfIRCodeGen::WriteObjectFile(const StringImpl& outFileName, const BfCodeGenOptions& codeGenOptions)
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bool BfIRCodeGen::WriteObjectFile(const StringImpl& outFileName)
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{
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// {
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// PassManagerBuilderWrapper pmBuilder;
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@ -4829,7 +4932,7 @@ bool BfIRCodeGen::WriteObjectFile(const StringImpl& outFileName, const BfCodeGen
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mHasDebugLoc = false; // So fails don't show a line number
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bool enableLTO = codeGenOptions.mLTOType != BfLTOType_None;
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bool enableLTO = mCodeGenOptions.mLTOType != BfLTOType_None;
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if (enableLTO)
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{
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@ -4840,97 +4943,6 @@ bool BfIRCodeGen::WriteObjectFile(const StringImpl& outFileName, const BfCodeGen
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}
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}
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llvm::CodeGenOpt::Level optLvl = llvm::CodeGenOpt::None;
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llvm::SMDiagnostic Err;
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llvm::Triple theTriple;
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theTriple = llvm::Triple(mLLVMModule->getTargetTriple());
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String cpuName = "";
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String arch = "";
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// Get the target specific parser.
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std::string Error;
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const llvm::Target *theTarget = llvm::TargetRegistry::lookupTarget(arch.c_str(), theTriple, Error);
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if (!theTarget)
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{
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Fail(StrFormat("Failed to create LLVM Target: %s", Error.c_str()));
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return false;
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}
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llvm::TargetOptions Options = llvm::TargetOptions(); // InitTargetOptionsFromCodeGenFlags();
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String featuresStr;
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if (codeGenOptions.mOptLevel == BfOptLevel_O1)
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{
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//optLvl = CodeGenOpt::Less;
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}
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else if (codeGenOptions.mOptLevel == BfOptLevel_O2)
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optLvl = llvm::CodeGenOpt::Default;
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else if (codeGenOptions.mOptLevel == BfOptLevel_O3)
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optLvl = llvm::CodeGenOpt::Aggressive;
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if (codeGenOptions.mSIMDSetting == BfSIMDSetting_SSE)
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featuresStr = "+sse";
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else if (codeGenOptions.mSIMDSetting == BfSIMDSetting_SSE2)
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featuresStr = "+sse2";
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else if (codeGenOptions.mSIMDSetting == BfSIMDSetting_SSE3)
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featuresStr = "+sse3";
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else if (codeGenOptions.mSIMDSetting == BfSIMDSetting_SSE4)
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featuresStr = "+sse4";
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else if (codeGenOptions.mSIMDSetting == BfSIMDSetting_SSE41)
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featuresStr = "+sse4.1";
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else if (codeGenOptions.mSIMDSetting == BfSIMDSetting_AVX)
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featuresStr = "+avx";
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else if (codeGenOptions.mSIMDSetting == BfSIMDSetting_AVX2)
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featuresStr = "+avx2";
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llvm::Optional<llvm::Reloc::Model> relocModel;
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llvm::CodeModel::Model cmModel = llvm::CodeModel::Small;
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switch (codeGenOptions.mRelocType)
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{
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case BfRelocType_Static:
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relocModel = llvm::Reloc::Model::DynamicNoPIC;
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break;
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case BfRelocType_PIC:
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relocModel = llvm::Reloc::Model::PIC_;
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break;
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case BfRelocType_DynamicNoPIC:
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relocModel = llvm::Reloc::Model::DynamicNoPIC;
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break;
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case BfRelocType_ROPI:
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relocModel = llvm::Reloc::Model::ROPI;
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break;
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case BfRelocType_RWPI:
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relocModel = llvm::Reloc::Model::RWPI;
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break;
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case BfRelocType_ROPI_RWPI:
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relocModel = llvm::Reloc::Model::ROPI_RWPI;
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break;
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default: break;
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}
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switch (codeGenOptions.mPICLevel)
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{
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case BfPICLevel_Not:
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mLLVMModule->setPICLevel(llvm::PICLevel::Level::NotPIC);
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break;
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case BfPICLevel_Small:
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mLLVMModule->setPICLevel(llvm::PICLevel::Level::SmallPIC);
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break;
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case BfPICLevel_Big:
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mLLVMModule->setPICLevel(llvm::PICLevel::Level::BigPIC);
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break;
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default: break;
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}
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std::unique_ptr<llvm::TargetMachine> target(
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theTarget->createTargetMachine(theTriple.getTriple(), cpuName.c_str(), featuresStr.c_str(),
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Options, relocModel, cmModel, optLvl));
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std::error_code EC;
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llvm::sys::fs::OpenFlags OpenFlags = llvm::sys::fs::F_None;
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@ -4941,20 +4953,20 @@ bool BfIRCodeGen::WriteObjectFile(const StringImpl& outFileName, const BfCodeGen
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// Build up all of the passes that we want to do to the module.
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llvm::legacy::PassManager PM;
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llvm::Triple theTriple = llvm::Triple(mLLVMModule->getTargetTriple());
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// Add an appropriate TargetLibraryInfo pass for the module's triple.
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llvm::TargetLibraryInfoImpl TLII(theTriple);
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PM.add(new llvm::TargetLibraryInfoWrapperPass(TLII));
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// Add the target data from the target machine, if it exists, or the module.
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mLLVMModule->setDataLayout(target->createDataLayout());
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//PM.add(new DataLayoutPass());
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PopulateModulePassManager(PM, codeGenOptions);
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PopulateModulePassManager(PM, mCodeGenOptions);
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llvm::raw_fd_ostream* outStream = NULL;
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defer ( delete outStream; );
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if ((enableLTO) || (codeGenOptions.mWriteBitcode))
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if ((enableLTO) || (mCodeGenOptions.mWriteBitcode))
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{
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std::error_code ec;
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outStream = new llvm::raw_fd_ostream(outFileName.c_str(), ec, llvm::sys::fs::F_None);
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@ -4990,11 +5002,11 @@ bool BfIRCodeGen::WriteObjectFile(const StringImpl& outFileName, const BfCodeGen
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//WriteBitcode
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bool noVerify = false; // Option
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if ((!enableLTO) && (!codeGenOptions.mWriteBitcode))
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if ((!enableLTO) && (!mCodeGenOptions.mWriteBitcode))
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{
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// Ask the target to add backend passes as necessary.
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if (target->addPassesToEmitFile(PM, out, NULL,
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(codeGenOptions.mAsmKind != BfAsmKind_None) ? llvm::TargetMachine::CGFT_AssemblyFile : llvm::TargetMachine::CGFT_ObjectFile,
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if (mLLVMTargetMachine->addPassesToEmitFile(PM, out, NULL,
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(mCodeGenOptions.mAsmKind != BfAsmKind_None) ? llvm::TargetMachine::CGFT_AssemblyFile : llvm::TargetMachine::CGFT_ObjectFile,
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//TargetMachine::CGFT_AssemblyFile,
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noVerify /*, StartAfterID, StopAfterID*/))
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{
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@ -5007,7 +5019,7 @@ bool BfIRCodeGen::WriteObjectFile(const StringImpl& outFileName, const BfCodeGen
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bool success = PM.run(*mLLVMModule);
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if ((codeGenOptions.mOptLevel > BfOptLevel_O0) && (codeGenOptions.mWriteLLVMIR))
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if ((mCodeGenOptions.mOptLevel > BfOptLevel_O0) && (mCodeGenOptions.mWriteLLVMIR))
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{
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BP_ZONE("BfCodeGen::RunLoop.LLVM.IR");
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String fileName = outFileName;
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@ -4,6 +4,25 @@
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#include "BfSystem.h"
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#include "BfTargetTriple.h"
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namespace llvm
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{
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class Constant;
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class Value;
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class Type;
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class BasicBlock;
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class Function;
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class FunctionType;
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class MDNode;
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class InlineAsm;
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class DIType;
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class DIBuilder;
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class DICompileUnit;
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class AttributeList;
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class Module;
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class LLVMContext;
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class TargetMachine;
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};
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NS_BF_BEGIN
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enum BfIRCodeGenEntryKind
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@ -72,10 +91,12 @@ public:
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llvm::AttributeList* mAttrSet;
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llvm::DIBuilder* mDIBuilder;
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llvm::DICompileUnit* mDICompileUnit;
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llvm::TargetMachine* mLLVMTargetMachine;
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Array<llvm::DebugLoc> mSavedDebugLocs;
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llvm::InlineAsm* mNopInlineAsm;
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llvm::InlineAsm* mAsmObjectCheckAsm;
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llvm::DebugLoc mDebugLoc;
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BfCodeGenOptions mCodeGenOptions;
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bool mHasDebugLoc;
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bool mIsCodeView;
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int mConstValIdx;
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@ -89,6 +110,7 @@ public:
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Array<llvm::Constant*> mConfigConsts64;
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public:
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void InitTarget();
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void FixValues(llvm::StructType* structType, llvm::SmallVector<llvm::Value*, 8>& values);
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BfTypeCode GetTypeCode(llvm::Type* type, bool isSigned);
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llvm::Type* GetLLVMType(BfTypeCode typeCode, bool& isSigned);
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@ -145,6 +167,7 @@ public:
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}
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void HandleNextCmd() override;
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void SetCodeGenOptions(BfCodeGenOptions codeGenOptions);
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void SetConfigConst(int idx, int value) override;
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llvm::Value* GetLLVMValue(int streamId);
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@ -156,7 +179,7 @@ public:
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///
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bool WriteObjectFile(const StringImpl& outFileName, const BfCodeGenOptions& codeGenOptions);
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bool WriteObjectFile(const StringImpl& outFileName);
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bool WriteIR(const StringImpl& outFileName, StringImpl& error);
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static int GetIntrinsicId(const StringImpl& name);
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