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More SIMD work
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parent
01ae40fcc8
commit
122e321d1c
12 changed files with 500 additions and 40 deletions
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@ -181,6 +181,9 @@ static const BuiltinEntry gIntrinEntries[] =
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{"pow"},
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{"powi"},
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{"round"},
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{"sar"},
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{"shl"},
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{"shr"},
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{"shuffle"},
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{"sin"},
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{"sqrt"},
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@ -2313,7 +2316,7 @@ void BfIRCodeGen::HandleNextCmd()
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{ (llvm::Intrinsic::ID)-2, -1}, // AtomicXor,
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{ llvm::Intrinsic::bswap, -1},
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{ (llvm::Intrinsic::ID)-2, -1}, // cast,
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{ llvm::Intrinsic::cos, 0, -1},
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{ llvm::Intrinsic::cos, 0, -1},
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{ (llvm::Intrinsic::ID)-2, -1}, // div
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{ (llvm::Intrinsic::ID)-2, -1}, // eq
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{ llvm::Intrinsic::floor, 0, -1},
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@ -2338,8 +2341,11 @@ void BfIRCodeGen::HandleNextCmd()
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{ llvm::Intrinsic::pow, 0, -1},
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{ llvm::Intrinsic::powi, 0, -1},
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{ llvm::Intrinsic::round, 0, -1},
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{ (llvm::Intrinsic::ID)-2, -1}, // sar
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{ (llvm::Intrinsic::ID)-2, -1}, // shl
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{ (llvm::Intrinsic::ID)-2, -1}, // shr
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{ (llvm::Intrinsic::ID)-2, -1}, // shuffle
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{ llvm::Intrinsic::sin, 0, -1},
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{ llvm::Intrinsic::sin, 0, -1},
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{ llvm::Intrinsic::sqrt, 0, -1},
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{ (llvm::Intrinsic::ID)-2, -1}, // sub,
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{ (llvm::Intrinsic::ID)-2, -1}, // xor
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@ -2753,6 +2759,12 @@ void BfIRCodeGen::HandleNextCmd()
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}
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}
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break;
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case BfIRIntrinsic_Not:
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{
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auto val0 = TryToVector(args[0]);
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SetResult(curId, mIRBuilder->CreateNot(val0));
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}
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break;
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case BfIRIntrinsic_Shuffle:
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{
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llvm::SmallVector<uint, 8> intMask;
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@ -3137,7 +3149,16 @@ void BfIRCodeGen::HandleNextCmd()
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break;
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case BfIRIntrinsic_Cast:
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{
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SetResult(curId, mIRBuilder->CreateBitCast(args[0], intrinsicData->mReturnType));
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auto arg0Type = args[0]->getType();
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if (arg0Type->isPointerTy())
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{
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auto castedRes = mIRBuilder->CreateBitCast(args[0], intrinsicData->mReturnType->getPointerTo());
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SetResult(curId, mIRBuilder->CreateAlignedLoad(castedRes, 1));
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}
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else
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{
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FatalError("Expected address");
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}
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}
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break;
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default:
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