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More SIMD work

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This commit is contained in:
Brian Fiete 2020-08-27 10:11:42 -07:00
parent 01ae40fcc8
commit 122e321d1c
12 changed files with 500 additions and 40 deletions
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1
IDEHelper/Compiler/BfIRBuilder.cpp
View file

@ -146,6 +146,7 @@ USING_NS_BF;
case BfTypeCode_Char32: return CreateConst(constLHS->mTypeCode, (uint64)(constLHS->mUInt32 OP constRHS->mUInt32)); \
case BfTypeCode_Int64: return CreateConst(constLHS->mTypeCode, (uint64)(constLHS->mInt64 OP constRHS->mInt64)); \
case BfTypeCode_UInt64: return CreateConst(constLHS->mTypeCode, constLHS->mUInt64 OP constRHS->mUInt64); \
default: break; \
}
#define UNARYOP_APPLY(val, OP) \

7
IDEHelper/Compiler/BfIRBuilder.h
View file

@ -447,13 +447,16 @@ enum BfIRIntrinsic : uint8
BfIRIntrinsic_MemMove,
BfIRIntrinsic_MemSet,
BfIRIntrinsic_Mod,
BfIRIntrinsic_Mul,
BfIRIntrinsic_Not,
BfIRIntrinsic_Mul,
BfIRIntrinsic_Neq,
BfIRIntrinsic_Not,
BfIRIntrinsic_Or,
BfIRIntrinsic_Pow,
BfIRIntrinsic_PowI,
BfIRIntrinsic_Round,
BfIRIntrinsic_SAR,
BfIRIntrinsic_SHL,
BfIRIntrinsic_SHR,
BfIRIntrinsic_Shuffle,
BfIRIntrinsic_Sin,
BfIRIntrinsic_Sqrt,

27
IDEHelper/Compiler/BfIRCodeGen.cpp
View file

@ -181,6 +181,9 @@ static const BuiltinEntry gIntrinEntries[] =
{"pow"},
{"powi"},
{"round"},
{"sar"},
{"shl"},
{"shr"},
{"shuffle"},
{"sin"},
{"sqrt"},
@ -2313,7 +2316,7 @@ void BfIRCodeGen::HandleNextCmd()
{ (llvm::Intrinsic::ID)-2, -1}, // AtomicXor,
{ llvm::Intrinsic::bswap, -1},
{ (llvm::Intrinsic::ID)-2, -1}, // cast,
{ llvm::Intrinsic::cos, 0, -1},
{ llvm::Intrinsic::cos, 0, -1},
{ (llvm::Intrinsic::ID)-2, -1}, // div
{ (llvm::Intrinsic::ID)-2, -1}, // eq
{ llvm::Intrinsic::floor, 0, -1},
@ -2338,8 +2341,11 @@ void BfIRCodeGen::HandleNextCmd()
{ llvm::Intrinsic::pow, 0, -1},
{ llvm::Intrinsic::powi, 0, -1},
{ llvm::Intrinsic::round, 0, -1},
{ (llvm::Intrinsic::ID)-2, -1}, // sar
{ (llvm::Intrinsic::ID)-2, -1}, // shl
{ (llvm::Intrinsic::ID)-2, -1}, // shr
{ (llvm::Intrinsic::ID)-2, -1}, // shuffle
{ llvm::Intrinsic::sin, 0, -1},
{ llvm::Intrinsic::sin, 0, -1},
{ llvm::Intrinsic::sqrt, 0, -1},
{ (llvm::Intrinsic::ID)-2, -1}, // sub,
{ (llvm::Intrinsic::ID)-2, -1}, // xor
@ -2753,6 +2759,12 @@ void BfIRCodeGen::HandleNextCmd()
}
}
break;
case BfIRIntrinsic_Not:
{
auto val0 = TryToVector(args[0]);
SetResult(curId, mIRBuilder->CreateNot(val0));
}
break;
case BfIRIntrinsic_Shuffle:
{
llvm::SmallVector<uint, 8> intMask;
@ -3137,7 +3149,16 @@ void BfIRCodeGen::HandleNextCmd()
break;
case BfIRIntrinsic_Cast:
{
SetResult(curId, mIRBuilder->CreateBitCast(args[0], intrinsicData->mReturnType));
auto arg0Type = args[0]->getType();
if (arg0Type->isPointerTy())
{
auto castedRes = mIRBuilder->CreateBitCast(args[0], intrinsicData->mReturnType->getPointerTo());
SetResult(curId, mIRBuilder->CreateAlignedLoad(castedRes, 1));
}
else
{
FatalError("Expected address");
}
}
break;
default: